Post-Silicon Power Engineer
Meta

Job Info

Reality Labs (RL) focuses on delivering Meta's vision through Virtual Reality (VR) and Augmented Reality (AR). The compute performance and power efficiency requirements of Virtual and Augmented Reality require custom silicon. Meta's Silicon team is driving the state of the art forward with breakthrough work in computer vision, machine learning, mixed reality, graphics, displays, sensors, and new ways to map the human body. Our chips will enable AR & VR devices where our real and virtual world will mix and match throughout the day. We believe the only way to achieve our goals is to look at the entire stack, from transistor, through architecture, firmware, and algorithms.We're looking for a Post-Silicon Power Engineer who will work with a world-class group of researchers and engineers to develop and deploy innovative use cases and power management solutions for an exciting lineup of AR/VR products.

Post-Silicon Power Engineer Responsibilities:

• Build pre- and post-Si methodologies/test-plans to characterize silicon features, correlate silicon power/performance with simulations, communicate findings to key stakeholders and help improve projections for next generation designs.
• Coordinate bring up activities across various subsystems, drive power debug and tuning for key use cases.
• Drive IP and SoC-level benchmarking activities to characterize power and thermal behavior across process, voltage, temperature.
• Work with system/SoC/board architects, software/firmware engineers, RTOS/application engineering, process specialists, ATE engineers and product engineers to find creative solutions to post-Si power/performance issues and deliver highly power efficient products.

Minimum Qualifications:

• Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience.
• 3+ years of experience working on power for production silicon.
• Hands-on experience with silicon bring up, power characterization, tester to system correlation and lab measurement/debug tools (oscilloscopes, multimeters, DAQs).
• Demonstrated understanding of silicon power, power management techniques, power tradeoff analysis.
• Experience employing scientific methods to debug, diagnose and drive the resolution of cross-disciplinary system issues.
• Familiarity with Python, C/C++, scripting, data visualization and statistical analysis tools.

Preferred Qualifications:

• Familiarity with binning methods, power supply noise, silicon reliability/aging.
• Familiarity with common pre-Si low power design practices, such as clock-gating, data gating.
• Knowledge of power trade-offs in design and back-end implementation.
• Experience in technology node scaling and projections.
• Experience with pre-Si power modeling and/or RTL/netlist power estimation tools such as PTPX, PowerArtist or Joules. Knowledge to understand power reports from these tools and find power optimization opportunities.
• Experience with Firmware development.

About Meta: